Solutions | Optical Systems

The LiDAR design workflow

Whether ranging works is decided by the shape of the transmitted beam, the collection of the return, and the scene itself. Low-reflectance targets, fog, interfering light. Whether a design holds up can only be judged on system-level metrics such as the depth map and detection range.

Design challenges

Making chip to scene one continuous chain

The nanophotonics that forms the beam, the array that steers it, the receiving optics that collect a faint return, and the scene, where atmospheric scattering and target reflectance dominate. A weakness at any one of those four scales sets the detection range on its own. Everything from component through to 3D scene has to be joined up and put into a form you can evaluate as a depth map or point cloud.

Requirement | beam formation and scanningThe emitting element and the array are solved physically to form the beam and steer its direction
Requirement | extracting range and velocityRange and velocity are obtained from the return at circuit level, according to the detection scheme
Requirement | holding up in a sceneEvaluated against standard-aligned metrics under real reflectances and degraded atmospheric conditions

Design and simulation workflow

From the emitting element to verification in a 3D scene

01

Select the architecture

Settle the scanning and detection schemes, and fix the analysis methods used from here on.

02

Design the emitting element

Obtain the radiation pattern and emission angle from the waveguide and grating.

03

Design the optical phased array

Arrange the emitting elements and confirm beam steering by phase distribution.

04

Circuit analysis of the detection scheme

Obtain the beat frequency from the chirped source and homodyne detection.

05

Design the transmit and receive optics

Design the projection and receiving paths, and evaluate stray light between them.

06

Verification in a 3D scene

Trace in a scene with materials and atmospheric conditions applied, and obtain the depth map.

The stages differ by project. Architectures that do not use a photonic circuit skip stages 02 to 04. Prototyping covers the chip, not the transmit and receive optics or the housing.

Related products

Products used at each step

The capabilities and coverage of each product are described on its own product page.

Lumerical MODE

Handles waveguide mode analysis. FDE gives the guided mode entering the emitting element.

Stage / 02

Lumerical FDTD

Handles analysis of the emitting element. Three-dimensional FDTD gives the radiation pattern and emission angle from the waveguide and grating.

Stage / 02

Lumerical INTERCONNECT

Handles circuit analysis of the optical phased array and the detection scheme. The chirped source and homodyne detection give the beat frequency.

Stage / 03-04

Zemax OpticStudio

Handles the transmit and receive optics and stray light evaluation, using sequential and non-sequential ray tracing as appropriate.

Stage / 05

Ansys Speos

Handles verification in a 3D scene. Tracing in a scene with materials and atmospheric conditions applied gives the depth map.

Stage / 06

Foundry and manufacturing

Carrying the chip design data through to manufacturing

For architectures that use a photonic circuit, once the chip layout is settled you move to prototyping through a multi-project wafer (MPW) or a dedicated run. Prototyping covers the chip, not the transmit and receive optics or the housing.

Whether prototyping and manufacturing are possible, and in what form, is judged case by case from the target platform and process conditions. For architectures that do not use a photonic circuit, this stage does not apply.

Talk to us about your scanning and detection schemes

Tell us where the design stands, how far architecture selection has progressed, whether the problem is on the chip side or the system side, and the metrics you want to evaluate, and we will propose a way forward.